1. Field of the Invention
This invention relates to a power regeneration circuit and a power conversion system.
2. Description of the Related Art
With reference to FIG. 7, a push-pull converter which is a kind of a power conversion system will be explained. In the push-pull converter shown, FET1 designates a first switching element, FET2 a second switching element, T a converter transformer, Vin a DC voltage source (for outputting a DC voltage Vin), D1, D2 rectification diodes, L a choke coil, and C1, C2 first and second smoothing capacitors.
SC1 designates a first snubber circuit connected between the source and the drain of the first switching element FET1, and SC2 a second snubber circuit connected between the source and the drain of the second switching element FET2.
Assume that this push-pull converter is not provided with the first and second snubber circuits SC1, SC2. In the case where the first and second switching elements FET1, FET2 turn off from on state, the current that has thus far flowed in the primary coil FN of the converter transformer T is reduced to zero instantaneously. Thus, a surge voltage (sharp voltage change) is generated between the source and the drain of the first and second switching elements FET1, FET2 due to the counter electromotive force generated by the leakage inductance of the primary coil FN of the converter transformer T. This surge voltage causes the breakdown or an increased operation loss of the first and second switching elements FET1, FET2. The first and second snubber circuits SC1, SC2 are provided for suppressing the surge voltage applied to the first and second switching elements FET1, FET2. Specifically, the first and second snubber circuits SC1, SC2 operate in such a manner as to reduce by absorbing the surge voltage generated between the source and the drain of the first and second switching elements FET1, FET2 due to the counter electromotive force.
An operation waveform of the essential parts of the push-pull converter is shown in FIG. 8. In FIG. 8, VG1 designates a gate voltage of the first switching element FET1, VG2 a gate voltage of the second switching element FET2, Vd2 a drain voltage of the second switching element FET2, Vd1 a drain voltage of the first switching element FET1, IS1 a snubber current of the first snubber circuit SC1, and IS2 a snubber current of the second snubber circuit SC2.
The first and second snubber circuits SC1, SC2 of the push-pull converter are configured of a series circuit including first and second snubber capacitors CO1, CO2 and snubber resistors RO1, RO2. In reducing the surge voltage, therefore, a considerable amount of power is consumed wastefully, thereby reducing the power conversion efficiency of the push-pull converter as a whole.
Further, a large snubber current flows in the first or second snubber circuit SC1, SC2 and a great amount of electric power is consumed wastefully when the first or second switching element FET1, FET2 turns off or when the second or first switching element FET2, FET1 turns on so that the source-drain voltage of the first or second switching element FET1, FET2 changes from Vin to 2Vin. This is another factor of reducing the overall power conversion efficiency of the push-pull converter.